After the very large success of our article on Pentium M, we could obtain other information of our preferred Russian sources. Those thus could obtain a document of presentation of INTEL on the futures processors planned for 2006. In those, here is one which leaves the batch clearly, as you can see it on slide Ci below. Currently known under the name of code of "Sossaman", this processor is in fact located in the series waiter. Derived from Yonah (Dothan Bi-Core), Sossaman will be in fact the first processor of the range Pentium M to support operation in SMP. One will be able thus to thus make function two Sossaman, them-even Bi-core on a mother chart waiter. Of what seriously to go on the plat bands of Xeon.

Level specifications, slide teaches us that Sossaman will be equipped with 2 Mo of mask L2 (1 Mo by processor) and that the frequency envisaged of introduction will be 2.3 GHz. It will also support the EM64T ("36 bit memory addressing"), the EIST (Gayserville 3), multi-threading (CPU Bi-Core obliges) and the "FSB address and dated parity", a system of control of errors on the data bus. One also learn that it will be equipped with a FSB667, that is to say 166 real MHz with a process of improvement of the bond SMPs. Niveau dissipation, Sossaman will support 100°C and will not consume more than 31 Watts. A version LV (Low Voltage) with 16w will be also available, which will make it possible to make passive cooling. Sossaman will be always on Socket µFCPGA, but with a pinout different from other CPUs (like Dothan compared to Pentium 4). Level availability, although envisaged for Q1' 06, Sossaman would be already in the course of validation, therefore, like Yonah, already tapped-out...

相關來源