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加入日期: Apr 2003
文章: 730
引用:
作者SouthPark7788
其實這代"實體"Cuda核心數跟上代都差不多
結論是這代安培架構引入了 類似 超線程 的技術...

以目前的消息來看
不太算是超線程,畢竟超線程就是在沒有增加內核架構的情況下,增加管線利用率
硬要說的話,NV這次比較像是AMD推土機架構 一核雙模
AMD推土機是一個模組=一個浮點配兩個整數
NV這次比較像是反過來
NVIDIA Ampere 一個SM子核心裡面是一組 16個INT32+16個FP32另外再加上一組16個FP32

https://www.nvidia.com/en-us/geforc...s-community-qa/

https://wccftech.com/nvidia-details...s-cards-reddit/
" One of the key design goals for the Ampere 30-series SM was to achieve twice the throughput for FP32 operations compared to the Turing SM. To accomplish this goal, the Ampere SM includes new datapath designs for FP32 and INT32 operations. One datapath in each partition consists of 16 FP32 CUDA Cores capable of executing 16 FP32 operations per clock. Another datapath consists of both 16 FP32 CUDA Cores and 16 INT32 Cores. As a result of this new design, each Ampere SM partition is capable of executing either 32 FP32 operations per clock, or 16 FP32 and 16 INT32 operations per clock. All four SM partitions combined can execute 128 FP32 operations per clock, which is double the FP32 rate of the Turing SM, or 64 FP32 and 64 INT32 operations per clock."
舊 2020-09-08, 10:23 PM #10
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