根據樓上網友提供的網址
https://www.anandtech.com/show/1417...-party-ip-ready

節錄:
TSMC says that when compared to N7 (1st Gen 7 nm, DUV-only), N5 technology will allow chip developers to shrink die area of their designs by ~45%, making transistor density ~1.8x higher. It will also increase frequency by 15% (at the same complexity and power) or reduce power consumption by 20% power reduction (at the same frequency and complexity).

5nm跟7nm DUV 比起來只有面積稍微及格

相同耗電量下頻率可提升15%
或是
相同頻率下可省電20%
跟之前節點的進步幅度相比
7nm DUV-->5nm真的是又貴又不太中用