可以參考此篇文章(英文).
http://www.dfi-street.com/forum/showthread.php?t=11397

Row Cycle Time(tRC)

”This BIOS feature controls the memory module's Row Cycle Time or tRC. The row cycle time determines the minimum number of clock cycles a memory row takes to complete a full cycle, from row activation up to the precharging of the active row. Formula-wise, the row cycle time (tRC) = minimum row active time (tRAS) + row precharge time (tRP). Therefore, it is important to find out what the tRAS and tRP parameters are before setting the row cycle time. If the row cycle time is too long, it can reduce performance by unnecessarily delaying the activation of a new row after a completed cycle. Reducing the row cycle time allows a new cycle to begin earlier. However, if the row cycle time is too short, a new cycle may be initiated before the active row is sufficiently precharged. When this happens, there may be data loss or corruption. For optimal performance, use the lowest value you can, according to the tRC = tRAS + tRP formula. For example, if your memory module's tRAS is 7 clock cycles and its tRP is 4 clock cycles, then the row cycle time or tRC should be 11 clock cycles. However, if the row cycle time is too short, a new cycle may be initiated before the active row is sufficiently precharged. When this happens, there may be data loss or corruption.”

Large Influence on Bandwidth/Stability.

Suggested Settings for DFI: 7 yields the best performance, 15-17 yields the best stability/over clock. 22 is way overkill. Start at 16, and work your way down from there. 7 is usually much too tight for most average ram. Remember the tRC = tRAS + tRP formula. (Lower = Faster)